Treffer: A 290-mV, 7-nm Ultra-Low-Voltage One-Port SRAM Compiler Design Using a 12T Write Contention and Read Upset Free Bit-Cell

Title:
A 290-mV, 7-nm Ultra-Low-Voltage One-Port SRAM Compiler Design Using a 12T Write Contention and Read Upset Free Bit-Cell
Authors:
Sinangil, M.E., Lin, Y., Liao, H., Chang, J.
Source:
IEEE Journal of Solid-State Circuits IEEE J. Solid-State Circuits Solid-State Circuits, IEEE Journal of. 54(4):1152-1160 Apr, 2019
Database:
IEEE Xplore Digital Library