Kobayashi, T., Sato, S. und Iwasaki, H. (2015) „Efficient Use of Hardware Transactional Memory for Parallel Mesh Generation“, in. doi:10.1109/ICPP.2015.69.
Chicago Manual of Style 17th edition (full note)Kobayashi, Tetsu, Shigeyuki Sato, und Hideya Iwasaki. „Efficient Use of Hardware Transactional Memory for Parallel Mesh Generation“. In . https://doi.org/10.1109/ICPP.2015.69.
American Psychological Association 7th editionKobayashi, T., Sato, S., & Iwasaki, H. (2015, September 1). Efficient Use of Hardware Transactional Memory for Parallel Mesh Generation. https://doi.org/10.1109/ICPP.2015.69
Modern Language Association 9th editionKobayashi, T., S. Sato, und H. Iwasaki. Efficient Use of Hardware Transactional Memory for Parallel Mesh Generation. 2015, https://doi.org/10.1109/ICPP.2015.69.
ISO-690 (author-date, Deutsch)KOBAYASHI, Tetsu, Shigeyuki SATO und Hideya IWASAKI, 2015. Efficient Use of Hardware Transactional Memory for Parallel Mesh Generation. In: . 1 September 2015