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1

LLIE: Low-Light Image Enhancement Network Based on FPGA.
Cui, Jiangtao ; Chen, Guanhua ; Zhang, Rui ; et al.
Journal of Circuits, Systems & Computers. 11/30/2025, Vol. 34 Issue 17, p1-15. 15p.

IMAGE intensifiers GATE array circuits IMAGE processing PARALLEL algorithms HARDWARE
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2

The Software-Centric Approach of SYNERGY: Technical Perspective.
Chow, Paul
Communications of the ACM. Aug2024, Vol. 67 Issue 8, p133-133. 1p.

COMPUTER software SERVER farms (Computer n... VIRTUAL machine systems COMPUTER architecture GATE array circuits VERILOG (Computer hardwa...
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3

Real-time holographic imaging programmable metasurfaces based on hardware accelerator computation.
Cheng, Haoliang ; Yang, Yunyun ; Gu, Manna ; et al.
Precision Engineering. Aug2025, Vol. 95, p495-504. 10p.

ELECTROMAGNETIC waves GATE array circuits DIODES ENCODING HARDWARE
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4

A novel ADE system with tunable droplet size and ejection height.
Shen, Shih-Hung ; Lian, Han-Wei ; Huang, Yu-Wen ; et al.
Journal of Applied Physics. 3/28/2024, Vol. 135 Issue 12, p1-13. 13p.

ACOUSTIC surface waves GATE array circuits
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5

Impact of reduced common mode voltage-PWM techniques on stator winding temperature using reliable thermal model: theoretical and experimental studies.
Ben Mahmoud, Zouhaira ; Guenenna, Thouraya ; Khedher, Adel
COMPEL. 2025, Vol. 44 Issue 4, p597-614. 18p.

TEMPERATURE control GATE array circuits STRAY currents IDEAL sources (Electric... MAINTENANCE costs PULSE width modulation …
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6

On the Harmonic Locking of Ring Oscillators under Single ElectroMagnetic Pulsed Fault Injection in FPGAs.
El Amraoui, Sami ; Douadi, Aghiles ; Leveugle, Régis ; et al.
Journal of Electronic Testing. Jun2025, Vol. 41 Issue 3, p257-272. 16p.

RANDOM number generators GATE array circuits PHYSICAL mobility VOLTAGE LOGIC
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7

Real-time FPGA-based architecture for assessing alertness and circadian disruptions using the Choice Reaction Test (CRT).
Panda, Nidhi ; Gupta, Supratim ; Baig, Mahammad ; et al.
Biological Rhythm Research. Jun2025, Vol. 56 Issue 6, p451-463. 13p.

SLEEP deprivation GATE array circuits WAKEFULNESS PROFESSIONS HARDWARE
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8

A Reconfigurable Framework for Hybrid Quantum–Classical Computing.
Pratibha ; Mahmud, Naveed
Algorithms. May2025, Vol. 18 Issue 5, p271. 21p.

GATE array circuits SOFTWARE frameworks ALGORITHMS COMPUTER software CLASSIFICATION
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9

Heterogeneous Tapped Delay-Line Time-to-Digital Converter on Artix-7 FPGA.
Chen, Riguang ; Chen, Ping ; Li, Kuinian ; et al.
Sensors (14248220). May2025, Vol. 25 Issue 9, p2923. 15p.

TIME-digital conversion GATE array circuits TIME-of-flight measureme... DELAY lines PHYSICS experiments
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10

Hardware-Accelerated Non-Contact System for Sleep Disorder Monitoring and Analysis.
Sravanthi, Mangali ; Gunturi, Sravan Kumar ; Chinnaiah, Mangali Chinna ; et al.
Sensors (14248220). May2025, Vol. 25 Issue 9, p2747. 17p.

RANDOM forest algorithms GATE array circuits MOVEMENT disorders SLEEP disorders SLEEP
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11

Toward an FPGA-based dedicated computer for molecular dynamics simulations.
Hamm, Peter
Journal of Chemical Physics; 2/7/2025, Vol. 162 Issue 5, p1-14, 14p

MOLECULAR dynamics SUPERCOOLED liquids GATE array circuits THERMOSTAT TORUS
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12

A Reconfigurable Digital Beamformer Implemented on a Field-Programmable Gate Array for Real-Time and Resource-Efficient Direction-of-Arrival Estimation.
Wang, Yuting ; Zhu, Liyuan ; Wu, Tianxiang ; et al.
Sensors (14248220). Apr2025, Vol. 25 Issue 8, p2497. 19p.

DIRECTION of arrival est... GATE array circuits PHASED array antennas SIGNAL processing RECEIVING antennas
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13

Self-Replication in a Mathematical Model of Particle Movement in Fluids, with Its Hardware Implementation.
Dlamini, Anastacia ; Goufo, Emile Franc Doungmo
International Journal of Bifurcation & Chaos in Applied Sciences & Engineering. Apr2025, Vol. 35 Issue 5, p1-22. 22p.

GATE array circuits CHAOS theory FLUID dynamics COMPLEX fluids AUTOPOIESIS
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14

An optimized hardware implementation of SHA-256 round computation.
Yao, Maoqun ; Xue, Ziwei ; Li, Haiwei ; et al.
Computer Journal. Apr2025, Vol. 68 Issue 4, p355-359. 5p.

GATE array circuits ALGORITHMS COMPRESSORS HARDWARE
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15

基于三维混沌系统的图像加密及FPGA实现.
闫少辉 ; 姜嘉伟 ; 崔 宇
Computer Engineering & Science / Jisuanji Gongcheng yu Kexue. Apr2025, Vol. 47 Issue 4, p686-694. 9p.

IMAGE encryption GATE array circuits SYSTEMS software SOFTWARE architecture TIMING circuits
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16

Dynamic Analysis and Implementation of FPGA for a New 4D Fractional-Order Memristive Hopfield Neural Network.
Yu, Fei ; Zhang, Shankou ; Su, Dan ; et al.
Fractal & Fractional. Feb2025, Vol. 9 Issue 2, p115. 20p.

HOPFIELD networks GATE array circuits LYAPUNOV exponents BIFURCATION diagrams DECOMPOSITION method
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17

Novel optimized implementations for the Piccolo cipher based on field‐programmable gate arrays.
Feng, Jingya ; Wei, Yongzhuang ; Wei, Bohua
International Journal of Circuit Theory & Applications. Feb2025, Vol. 53 Issue 2, p771-789. 19p.

GATE array circuits DATA security INTERNET of things BLOCK designs CIPHERS BLOCK ciphers …
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18

Strongly perturbed bondorbital attractors for generalized systems.
Dlamini, A. ; Doungmo Goufo, E. F. ; Khumalo, M.
Chaos. Feb2025, Vol. 35 Issue 2, p1-15. 15p.

GATE array circuits FRACTIONAL calculus DIFFERENTIAL equations SYSTEM dynamics HARDWARE
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19

On-Satellite Implementation of Real-Time Multi-Object Moving Vehicle Tracking with Complex Moving Backgrounds.
Yu, Jingyi ; Wei, Siyuan ; Wen, Yuxiao ; et al.
Remote Sensing. Feb2025, Vol. 17 Issue 3, p418. 28p.

AFFINE transformations GATE array circuits RELATIVE motion INFORMATION processing PIXELS ARTIFICIAL satellite tra...
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20

FPGA-based process, voltage, and temperature insensitive picosecond resolution timing generators with offset correction for automatic test equipment.
Guo, Zeyu ; Gui, Liangqi ; Sheng, Kai
Review of Scientific Instruments. Feb2025, Vol. 96 Issue 2, p1-11. 11p.

GATE array circuits TIME management VOLTAGE INTERPOLATION TEMPERATURE
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